Updated 2016.
This page about 2 x 50W class A amps with mosfets and OPT.

Picture 1. 2 x 50 watt class A amps.
Fig 1. Schematic 50W amp + PSU, 3 x small bjts and 4 x 2SK134, OPT, fixed bias.
2SK134 design parameters of , Rd and gm. Mosfet gain calculations, 3 loops of NFB explained.
Picture 2. Inside of 50W monobloc.
Fig 2. Schematic of Basic Model of SE mosfet amp with 1 x bjt and 1 x 2SK134 output mosfet with
all voltage & current path calculations, more on NFB.
Shunt NFB explained, alternative B+, loads, power, psu notes, heatsinks.
Notes on SE mosfet designs with choke feed and cap coupling,
class A PP alternatives. Picture of inside the amp.
Fig 3. 50W OPT details for 50W monoblocs.
About partial air gapping, core types.
2SK134 properties, gm, Rd, .
About heatsinks for class A.
Fig 4. Schematic of 2 x EL84 used to drive 4 x 2SK134 or 2SK1058.

Picture 1. 2 x 50W mono amps on bench.

2 x 50W class A
In 2000 I built the above pair of 50W class A SS amps using 4 x Hitachi 2SK134 per
channel, and I used a similar amp topology to use of 2 small input pentodes and 4 output
EL34 pentodes in a normal PP amp.

The input and driver stage uses three generic TO92 package npn bjts for a differential pair
( Long Tail Pair ) with a CCS common emitter current sink. The collectors of LTP are 
capacitance coupled to gates of 4 npn mosfets with a fixed +Vdc bias applied.
Output mosfets drive a wide bandwidth OPT. The use of only npn mosfets in a PP output
stage gives very low distortion compared to use of pnp + npn mosfets which are not naturally
well matched for their biasing or transfer function. Use of an OPT prevents any speaker from
ever being directly connected to a Vdc rail if an mosfet fails by becoming a short circuit,
which they do when someone uses a shorted speaker cable for a few minutes on low power
without realizing anything is wrong. I had the spare time and the spare materials laying around,
so I developed the following schematic:-
Fig 1. PP 50W mosfet amp.

Input Q1 and Q2 are BC546 but may be many other type, PN100 are OK, and these form an input
differential amp aka long tail pair aka LTP with 2 x Q3 BC546 as the pair, and BC109 as a low noise
constant current sink aka CCS to sink the 2 x 6.3mAdc Idc Q1+2 from commoned emitters.
Q1 and Q2 have medium voltage gain due to 47r R11+R12 for local current FB and they are
quite linear while handling max Ic signal current of +/-1.8mApk, and producing less than +/- 2Vpk
at each collector.
The input signal is to Q2 base with GNFB to Q1 base.

The output stage Q4-Q7 are four 2SK134 N type Hitachi output mosfets with idle Ed = +33Vdc
and idle current 0.7Adc each for Pdd = 23.1W. Total Pdd = 92.4W, and maximum class A possible
= 43W at mosfets. 3W is lost as heat in source 0r22 and Rw in OPT, so max class A Po = 40W
at OPT secondary terminals. The B+ supply is nominally +35Vdc at C15, which drops slightly
to +34Vdc at OPT CT because of choke resistance.

The 2SK134 are from 1980s and considered excessively ancient, and not available except
as NOS. There may be better types now in 2016, but from what I have seen and read, most
modern types are just not made with the same benign negative temperature co-efficient for the
idle current I want to use to maximize class A operation. The modern types have far higher specs
for max currents and very high gm, but when you examine most power mosfets you will find gm not
much better than 2SK134, because gm tends to vary hugely with the current, and I am only interested
in having lower peak current < 3A, and I am not interested in class B with 2 mosfets to make 100W
into 4r0 where peak current = 7A, with ability for 2r0 and peak current = 14A.

The 2SK1058 is
a flat pack TO3P type still widely available and has very similar character to 2SK134
thus is much easier to fix to a flat surface of a heatsink without the need of a mounting flange for the
older TO3 types which were held by 2 insulated screws and needed 2 holes in flange for source and
gate connections, with connections to the drain using lugs held by screws through the case.

The use of 2SK134 or 2SK1058 have the huge advantage of having a negative temperature
co-efficient for the idle current region used. This means the idle Idc is highest at turn on and as
mosfets warm up they conduct less current. Therefore they protect themselves better than any
power transistors, and I found use of fixed Vdc gate bias worked just fine with no later
re-adjustments needed, and no active regulation of bias is required to work based on having
temperature sensing bjts as found in many amps with only BJTs.

I made up the heatsink from scrap aluminium I found, and made platform to mount mosfets from
two Al angles 120mm long, stacked for 12mm thick, using 50mm x 75mm x 6mm section.
22 fins are 125mm high, using 25mm x 75mm x 2mm thick AL angles, well bolted to 20mm x 60mm
x 6mm AL angles for top and bottom rails. All AL angles are well bolted with liberal use of thermal
paste between all joins.
The 4 x 2SK134 are fairly close together in centre of heatsink on the 12mm thick ledge.
Although this works, the mosfet temperature is much higher than the nearest heatsink fins which
are hotter than fins at end of heatsink. The heatsink never gets too hot to touch even on a hot
day of +27C inside my house.
The surface area of all fins and plates is about 40sq.cm per watt of heat to be dissipated.

The performance could be better using 6 x 2SK1058 flat pack mosfets spaced evenly along
the heatsink about at 50mm up from the bottom edge of the 125mm high heatsink.

Picture 2.
Inside one 50W monobloc. The PSU toroidal power transformer is under choke at left rear,
2 x 4,700uF at left front, circuit board and mosfets at rear centre with more electro C,
3 x 15,000uF caps right front, and 5Kg OPT with C-cores at right rear.

The wide bandwidth OPT has GOSS double C-cores, Build up total T = 38mm,
strip width S = 55mm, window L = 58mm, H = 19mm. These C-cores were made by AEM
in Sth Australia before they ceased C-core production, and were aimed at the market to be a
replacement for wasteless pattern E&I lams with 38mm tongue size. I measured the maximum
for the C-cores was not more than 4,500. This was sufficiently high to give cool core running
mains transformers, and quite adequate for any OPT. Not all C-cores from AEM had max 4,500,
some I used in a tubed 5050 amp measured > 10,000.

The C-core Afe = 38mm x 55mm = 2,090sq.mm.

Better would be E&I square section Afe with 44mm stack x 44mm tongue. With 40Vrms across
primary for 40Watts of class A into RLd-d = 35 ohms, Fsat occurs at 12Hz. The OPT is about
the same size as for a well designed 50W OPT on a tube amp.
The OPT P:S turn ratio = 248t : 96t = 2.5833 : 1 giving ZR = 6.674 : 1 for load ratio 33.4r : 5r0.
Primary has 8 layers each with 62 turns of 0.75mm Cu dia wire OPT, arranged for two parallel
windings of 248t, each with a CT taken to +34Vdc. Ends of windings are taken to mosfet drains.
Secondary has 6 layers each with 48t of 1.0mm Cu dia wire arranged for 3 parallel windings
of 96t, with one end taken to 0V, and other end to active output and for GNFB.
The OPT bandwidth for 40W class A with plenty of interleaving is 12Hz at Fsat to 300kHz.
Total winding loss = 7.7%.

Fig 2. OPT diagram details.


Original max of C-cores from AEM was 4,500 and too high, causing an abrupt onset of
core saturation below 12Hz at Vd-d = 40Vrms. I put a small 0.03mm air gap between all
joins in C-cores using thin plastic sheeting. This reduced the max to 2,200 to prevent
sudden saturation effects below 16Hz at over 50W Po. The air gapping prevents high
peak currents produced by mosfets flowing in primary wire resistance below 16Hz when
the magnetic field collapses during saturation for part or all of the wave cycles.
It is better to have reduced maximum OPT primary inductance if it gives less sudden
saturation below a LF threshold, ie, the ideal is to have the impedance of primary input
remain inductive to as low a frequency as possible.

Sudden saturation may all too easily cause solid state devices to fail before a fuse blows.

This gapping technique for PP OPTs
opened my mind to using "partially gapped" cores
for any PP transformer. With modern GOSS core material the of the core may be much
higher than it needs to be. In 1955, most grain oriented E&I laminations when maximally
interleaved had a maximum = 4,500. But I have often found GOSS lams which have
max = 17,000. ( is maximum permeability of core ). This means that the material
saturates easily if the dc in each half of the primary is unbalanced, or there are stray very
low frequency signals across the primary.
Toroidal cores can have max = 40,000 and
are even more unsuitable if there is unbalanced DC

C-cores with high > 7,000 are possible and if the joins between C have been polished.
A reduction of effective by use of an air gap is easiest to achieve with C-cores for
PP amps with balanced DC or for SE amps with heavy DC in one direction.
Primary inductance for PP with balanced DC can be far higher than it needs to be without
an air gap and prone to saturation. For most PP amps, XLp should equal primary RL at
10Hz or lower, but Fsat should occur below 14Hz at the max Vo for clipping at 1kHz.

My C-cored OPT has Lp = 1.26 x N squared x Afe x / ( 1,000,000,000 x ML ) =
1.26 x 0.248 x 0.248 x 38 x 55 x 2,200 ( 1,000 x 210 ) = 1.7Henry.

XLp = 33r at 3.1Hz, and at 20Hz XLp = 212r, and this makes hardly any difference to
total load of Lp // RL where RL = 33r. The -3dB pole where load reduces -3dB to
23r3 is 3.1Hz and I could not observe the reduction of Vo at high Vo levels on the CRO
because the core will saturate at F and waves will reduce with high THD well above
the LF pole.

The C-cored OPT could have Lp minimum could be 0.56Henry, with reduced to 724.
At 20Hz, XLp = 70r, and is twice RL 33r, and Z L//RL is not much reduced from RL
and the NFB will keep the response flat without clipping up to 2dB below clipping at 1kHz.

To test the OPT Fsat, sec load should be disconnected and amp Vo set at the clipping
voltage when loaded and for 1kHz. If there is no saturation above 14Hz  the OPT has
enough primary turns and enough iron.

When the load is connected, and the 1 kHz clipping level is used, the amp will appear
clip above 14Hz and distortion is seen because the load value may have become lower
with Lp shunting RL, so its important to not confuse clipping at say 18Hz with core saturation.
Saturation distortion looks different on CRO than clipping, and once viewed, you'll know
the difference. Saturation distortion onset is very sudden and ugly at say 14 Hz.
But Fsat frequency is dependent on voltage level, so that if the level is half clipping level,
ie, -6dB level, Fsat should occur at 7Hz, and for -12dB, its 3.5Hz. With normal levels with
music or movie sound containing much low bass, the levels should all be well under clipping
and saturation should never be a problem.

In good SE amps, XLp = RL at 20Hz or lower. If I used the 4 mosfets in parallel
and each set up with Pdd = 24W Ed = 24Vdc and Id = 1Adc each, then each RLd = 21r6,
and total load for OPT is 5r4, and an OPT isn't needed because sources could be connected
to 5r4 via 10,000uF, and the OPT would just be a single winding choke and of about the same
size as my OPT, and
with an air gap, and if XL = 5r4 at 14Hz, L = 61mH, and the air gap
would effectively increase magnetic path length and thus effectively lower to perhaps
less than 200. I'll leave readers to decide whether SE mosfets can work well using a choke
and I see no reason why the performance would not be similar to the good performance
of SE32 or SE35 with tubes.

GOSS E&I laminations made after 2000 and sold by Sankey Australia before they ceased
operation had max = 17,000 with
with maximum inter-meshing of lams. It was fabulous
material for PTs because the core hardly even got warm. Standard GOSS E&I or C-cores
may now reach 10,000. In my 50W OPT for mosfets the could be 700 without causing any
loss of response at bass frequencies above 14 Hz. E&I lams may be given partial gapping
by arranging all the Es and Is in sub-packs of say 10 pcs all facing the same way.
Each pack of 10E and 10I  are then inserted into the bobbin hole for cores in alternating
directions. But to get it right, the core material's must be measured with this partial air
gapping by applying say 50Vrms of say 50Hz across primary winding and measuring
winding current to get the 50Hz reactance from which inductance may be calculated and
then with gapping may be calculated because turns, Afe, voltage and Bmax are all known.
This is the sort of thing manufacturers hardly ever bothered to do.
The results of the measurements allow the to be adjusted by changing the number of
laminations sub-pack.

C-cores are more easily gapped by inserting a piece of thin plastic sheet between C
and with some varnish prior to clamping the cores tightly. But NEVER EVER assume
anything about core properties until you have measured it properly!
The effect of the reduction of is to ensure the primary inductance keeps working as an
inductance across the load to F below 14Hz. One does not want the core to suddenly
saturate at 10Hz and become a load on devices equal to the very low wire resistance.

Each mosfet has an idle current of about 0.7 amps, and with Ed = +33Vdc, Pdd = 23.1W.
This is the reliable continuous limit for a TO3 package device IMHO. The drain to drain
load = 35r including Rw. Each side of PP circuit has load =17r5 load in class A so each
mosfet "sees" a class A load = 35r.

Calculation of RLd for one mosfet in pure class A is :-
RLd = 0.9 x Ed / Idc. In this case I have Ed = +33Vdc, Id = 0.7Adc, Pdd 23.1W.
RLd = 0.9 x 33V / 0.7A = 42.4r. Max class A Po = 0.5 x Idc squared x RL
= 0.5 x 0.7 x 0.7 x 42.4 = 10.39W.
Use of higher Idc = 0.83Adc gives Pdd = 27.4W, slightly too high, but does give RLd = 35r,
and Po = 12W. My amp can make up to 70W in class AB with a low output RL,
but can make 40W of pure class A if the RLs-s is 42r and output load = 6r3 and Idc =
0.7Adc per mosfet. This means all speakers above 6r3 can get only pure class A from amp,
and with speakers between say 3r0 and 6r3 the power becomes class AB but there will
be enough initial class A Po to cover most listening by most ppl.

Because the mosfet types used have negative temperature coefficient, they may have fixed
gate Vdc bias set by the resistance divider of R21/R22, 32k and 1k, providing about +1Vdc 
to all the gates via the 68k bias resistors. There is cap coupling from the driver stage and
because there are only two stages in the amp, the stability at LF is excellent.
At gross overload, the caps charge up like they do in a tube amp, and the mosfets are driven
into a temporary state of class C and harmless cut off. This only occurs when the power
exceeds the clipping level, so there is no need to worry about the effect under normal operation,
just as is the case with a good tube amp. The 7.5 volt back-to-back zeners limit the applied
Vpk the mosfet gates 
In practice, and for hi-fi use this amp has no bad habits due to the cap coupling. The gate
input impedance of the mosfets is extremely high like the grids of a tube and hence CR coupling
is a very effective coupling method and just because solid state devices are used there is no
reason why direct coupling must be used as in the much more powerful '2 x 300W' amp
mentioned elsewhere at this website. The low frequency stability is not compromised since
there are so few consecutive stages. The use of the OPT does not permit direct coupling
of the mosfets to the speaker load so the failure of a mosfet will not connect the internal DC
supply to any speaker connected. No protection circuit is needed apart from fuses.

Each mosfet under the above operating condition acts with a similar distortion profile to a
good beam tetrode. But at low power they are surprisingly linear. Mosfets do not use current
to drive their high impedance gates < 500k; they are voltage controlled current sources shunted
by some shunted by some high resistance and capacitance and so they may be thought of like
pentodes or beam tetrodes. In this application for mainly class A operation with Id idle current
= 0.75Adc, I measured 2SK134 to have :-

Amplification factor, = 180 to 200,
Dynamic drain resistance, Rd = 257r to 220r approx,
Transconductance, gm = 0.7 to 0.9 Amps / Volt.
The , Rd, and Gm vary considerably between Id min = 0.0A and Id max = 2Apk.
The region of interest is the low power operation where Id varies less than +/- 10%

2SK134 has very high gate input resistance like a tube but gate to source input C is high
at about 300pF, much higher than a tube. Driving mosfet gates needs a low resistance Vac
source lower than for a tube grid. The source output resistance at Q1+Q2 collectors is
determined by collector loads of 4k7 to B+ and the ratio of this R plus the gm of Q1+Q2 to
the amount of C to be driven is just as good as in the best tube amps. The Vg-s required
for the output gate C is much less than for any power tube because the mosfet gain is over
20 and the mosfet drain output voltage is not more than 30Vpk.
Therefore the maximum current needed at HF to charge or discharge Cg-s and Miller Cg-d
is easy to get from from Q1+Q2 collectors. Thus mosfets are fairly easy to drive, and there
is very low gate input current at audio F. With bjts in output stage, there base input resistance
is very low and difficult to drive unless you have a Darlington Pair connection. 
At LF where capacitance reactance does not matter much, the mosfet may be considered
a like a power pentode, EL34. The mosfet Rd curve shapes are like the Ra curves for EL34
pentode, but mosfet currents are 20 times higher and voltages 1/20 of the EL34. Both tubes
and mosfets are equally effective to convey good music to our ears, but the mosfet cannot
be wired as a triode, and some will say triodes are the gold standard.

Consider 1 x 2SK134 with constant Pdd = 23W, and can swing 20.8Vrms into RLd = 42r to
make about 10.3W in SE class A, about same as 1 x EL34.
Idle Idc = 0.7A, = 180, Rd = 257.
The Voltage Gain equation below is the same as for a pentode or triode, but can be applied
to a mosfet :-

Voltage gain A  =    x RL      =    180 x 42r    =  25.28.
                              RL + Rd          42 + 257r
For Vd-s 21Vrms, Vg-s = 0.8306Vrms, IRL = 21V / 42r = 0.5Arms. If Rs = 0r22 then VRs
= 0.11Vrms. Then total Vg-0V = 0.8306V + 0.11V = 0.941Vrms.

Each 2SK134 has drain resistance Rd = 257r plus the effective value of 0r22 which appears
as x Rs = 180 x 0.22 = 40r. Total effective Rd = 297r. Two 2SK134 in parallel on each side
of PP circuit have  drain resistance = 149r.
With 4 x 2SK134 there is 149r each side of OPT input and these sum to make 298r total source
resistance in series to the OPT primary load of 42r.
The damping factor DF = 42r / 298r = 0.141 which is a very low DF, because the source
resistance is 7.1 x load. The OPT has TR 2.58 : 1 and ZR = 6.66 : 1, so the secondary Rout
= 298 / 6.66 = 45r. The load needed at sec to give 42r at primary = 6r3. ( just like most generic
8r0 speakers ).

The speaker Z will probably vary between 5r0 and 30r and we need to reduce Rout from 45r
to about 0r6 to give a damping factor of about 10.

Two balanced shunt voltage NFB loops and a single series voltage global NFB loop is used.

Fig 3. Most basic shunt FB model.
Fig 3 shows the most basic shunt FB with R1 + R2 network between output of an amp and input
voltage source. In this example, the triangle amp has gain = 24, and the figures show the the results.
But without knowing the Rout of devices in triangle, we cannot calculate Rout with NFB. Such basic
model diagrams usually assume the device is an op-amp, but it could be a single tube or a mosfet etc.
Inputs 1 & 2 are assumed to be high Z, but in fact input may be low Zin if it is a cathode or source
or emitter. Correct working can only occur if input 1 is high Zin.

Fig 4. Model of 1/2 the amp used in 50W monobloc in class A.
Fig 4 shows 1/2 the schematic in basic model form of Fig 1 schematic. BC546 and 2SK134 are
shown as "voltage controlled current generators",  the double Os, with high input Z and infinite Z
between c to e, and d to s, with a finite amount of shunt resistance Rc, Rd which is appears
strapped across the internal device and which can be seen in data sheets where Rc or Rd curves
are slightly sloped up from low Ec or Ed toward the right. The base to emitter input resistance
of BC546 has been ignored, but would be over 5k0 and the Vac source resistance of base input
signals < 50r.

Instead of having shunt NFB network with 'R1' & 'R2' between input voltage source and output, 'R1'
is the total of parallel resistances Rc//RLdc//Rbias = 4.21k, and are between mosfet gates and 0V.
'R2' is 22k between mosfet sources and gates. The BC546 with high output Rc resistance supplies
current to the junction of 'R1' and 'R2' which is the gate. Any THD voltage at drains is divided by the
R network fraction = 0.161, and appears at gates to be amplified by mosfet gain x 22.3 to make
a correction signal to subtract from the THD which appears before any NFB is applied.

If we measured Vdn at drains = 0.21Vrms+, then Vdn at gates = 0.0338Vrms+ which is amplified
x 22.3 to make a correction signal = 0.754Vrms-, which we cannot measure. The Vdn which exists
before NFB is applied = ( calculated correction Vdn + measured Vdn with NFB ) = 0.745V + 0.21V
= 0.96Vrms+.
The NFB reduces THD by factor of Vdn with NFB / Vdn without NFB = 0.21V / 0.96V = 0.217
= -13.5dB.

The full exact model of a bjt is more complex than I have shown, but what I do show is enough to
do the analysis to grasp the fundamental mental concepts.
The effective collector resistance Rc for Q1 BC546 cannot be accurately known unless it is measured,
but a view of static curves by someone with curve tracer showed BC546B had Rc > 80k at Ic = 7mAdc,
and Ec = 20Vdc, about as I have Q1+Q2.
Typical gm = 0.05A/V, so that > 4,000, and with re 47r, the effective Rc > 250k. Most ppl do not
consider the ideas of gm and apply with bjts, and they want to discuss all in terms of hfe, ie, relative
currents of base and collector, and that is all very well, but the fact remains that you need a voltage
applied between base and emitter to make anything Vc appear, and the old fashioned tube terms
can be universal.
I found it safe to assume effective Rc = 100k, and calculate results which may be better in a real circuit.

Being totally exact with the figures for all these sorts of analog circuits is dreadfully tedious, and it is
almost impossible to get analysis to be 100% correct, and then find the next fellow with IQ 269 is happy
to spend 2 months to work out that you were right by a factor of only 97%.

What I offer is enough depth, rather than none at all.

The global negative feedback network,
a generic sample of "series voltage NFB."
Fig 1
amp schematic has 0.65Vac applied as GNFB from OPT sec to base of Q1 bjt in the input
differential pair.
For the Q1+Q2 collector Vc as shown, required base to base input is about 0.12Vrms. Therefore the
base input to Q2 = 0.65Vrms NFB + 0.12Vrms = 0.77Vrms.
Gain reduction factor with GNFB = 0.12V / 0.65V = 0.18, or -14dB.
Total NFB is shunt NFB and GNFB = 13.5dB + 14bB = 27.5dB. This is quite enough total NFB to
reduce THD, IMD, noise, and Rout to levels only found from the best of amps.

Heat dissipated in mosfets in class A is always a worry because they run warm or even hot even
with no signal at idle. But they get slightly cooler once music signals are amplified because some of the
Pdd heat at idle is converted to audio power. Under most conditions where average AF Po is 2W, and
the idle power of mosfets is 100W, the the Pdd is at average of 98W, and there is no insignificant change
of temperature.

Heatsinks should always be chosen to handle more heat than any theory might say is OK.
My theory suggests a few things :-
1. Do not ever rely on a fan, or build any hi-fi amp with a fan. That is because fans always make noise,
and what happens when the fan ceases to work for one of many reasons?
2. All hi-fi amp heatsinks must have vertical fins, and with no restriction on a free flow of air up past the
fins. Where ever possible, the flat vertical inner surface of a heatsink should have ventilation from
many holes in bottom plate cover and up through holes in the top of sides of amp box.
3. The total surface area of the heatsink including both sides of all fins and inside flat surfaces must
be at least enough to have 40 square centimetres, or 6.25 sq.inches per watt of heat likely to be
produced even in a fault condition.
4. Temperature rise above ambient should remain less than 20C. It means that if the room temp
is 25C, quite warm, then heatsink should go no higher than 45C, and you can place a hand on that
without being burnt, but you won't want to keep your hand there.

Above, I have said we would have Pdd for one 2SK134 = 23W, and I suggest heatsink size area Ahs
be OK for 30W, so Ahs for one mosfet = 30 x 40 = 1,200 sq.cm, and for 4 mosfets Ahs = 4,800 sq.cm.

Best heatsink for this type of amp is from Conrad Heatsinks in Melbourne.



See the MF35-151.5 Its 350mm long, x 151mm high and has thermal coefficient of of 0.21, and best
suits flat pack TO3P style mosfets simply screwed to flat surface on one side away from fins on the
outer side.
There are 35 fins of 40mm long x 150mm, with main plate 350mm x 150mm, and total surface area
= 5,250 sq.cm. This HS is longer and taller than on my amp and you really need more internal volume
than I used for each 50W mono amp. I have 4 x 2SK134 bolted beside each other on a 12mm AL
angle ledge which bolts to center of a home made HS from scrap AL I had accumulated. T rise = +25C
above ambient and because mosfets are clustered in center they make the central portion of HS hotter
than it would have been had the mosfets been spread out evenly along the HS length.

I have a pair of M35-151.5 ready for use with the next mosfet amp I make.

Meanwhile, I don't want to change much in the amp I already have, and I don't ever use 50W, and all
is OK if the first 20W is pure class A and remainder is class AB. I have found Pdd of 23Watts is OK
with Ed = 33Vdc and Id = 0.7Adc.

Nelson Pass once promoted a simple mosfet amp which used Ed = +17Vdc with Id = 3Adc, and with
ONE mosfet and with Pdd = 51W. A friend of mine tried to build this 'Zen' amp and after smoking 3
expensive IRF mosfets due to inexplicable "smoke and silence" events he gave up and has never
the time to learn more and complete the amp. From Pdd of 51W, some 17W of SE class A
was supposed to be available for RL = 3r8. 

Take my word for it, 30W is the absolute limit for idle dissipation in any flat pack or TO3 devices !!!!!

The noise was slightly too high without GNFB. But the GNFB reduced mosfet noise to negligible levels.

Rout measured 0.2 Ohms with GNFB, THD < 0.2% at -1dB below clipping, and declining towards
zero as the output power was reduced. There is absolutely ZERO crossover distortion.

The amp needed zobel networks across the collectors of the driver LTP, and across each half of the
OPT to shelve the HF gain and control phase shift the same way as a tube amp would need.
The OPT has a full power bandwidth from 10Hz to 300kHz, (
not a typo ), and this much bandwidth
cannot be used, and could lead to RF oscillations. To control overshoot on square waves with
capacitor loads above 40kHz the shelving networks were employed and so the final finished bandwidth
is a more sensible 10Hz to 65kHz, with pleasing looking 5kHz square waves.

About 99.9% of mainstream solid state amps do not use an OPT. I have proved to myself OPTs can
be used effectively. My mosfet amp has the ability to get a good load match even to 3 ohms, and still
get a large amount of class A Po, always good for the music. Since all the output devices are NPN
types with the same part number, any even number H products on each side of the PP circuit cancels
almost perfectly. The circuit doesn't need an intermediary high gain voltage amplification stage.
Instead of having a single phase of drive signal applied to a complementary PP pair of PNP and NPN
devices, the two output phases of the input differential amp are both used. The difference between
PNP and NPN devices when in common source mode is substantial, equivalent to having an EL34 on
one side of a tube PP amp and a 6L6GC on the other; it does not give the best outcome.

Future possible improvements.
I did think about use of using a pair of matched darlington pair
connected bjts for the differential input/driver LTP to increase local open loop gain and give better
linearity and to increase the input impedance of the amp slightly. But then I realized I would still have
bjts at the input, so would they sound better or measure better? I doubt it.

Then I thought of using 2SK369 j-fets for LTP diff input plus its CCS for commoned sources to give
an amp with only j-fets and mosfets. 2SK369 has nearly same specs as 2SK147, now no longer made
by Hitachi. 2SK369 has slightly lower Pdd rating of 0.4W. With Ed +15V and Id 8mAdc, Pdd = 0.12W
so they would survive without needing heatsinks. 2SK369 will work OK with same idle currents as I have on
bjts Q1+Q2, but Ed could be lower at +15Vdc. 2SK369 has very high input impedance gates and produces
far less noise than any bjt at Id 7mAc. The gm = 40mA / V at 5mA of idle current and would suit this
application very well. I doubt much change to sound, but Hooze Tanoe unless someone tries it?

Most PP tube amps have schematics just as simple as my 50W mosfet amp. The simplest PP will use
2 input tubes to drive 2 more output tubes. Quad-II with
2 x EF86 driving 2 x KT66 is a perfect example.

Consider 4 x 2SK134 in balanced source follower mode to drive an OPT and with Ed +33Vdc,
Id 0.7Adc and class A load = 24r, with Re 0r22. Open loop gain = 25.2, with Re it is 22.3, and source
follower connection reduces A to 22.3 / ( 1 + 22.3 ) = 0.961, so A reduction with the follower NFB
= -27dB, and THD is reduced by same factor, and it is 13.5dB more than use of 13.5dB of shunt NFB
so far explained. One might expect 5% THD in class A with no NFB at all, but with 27dB, this is reduced
in theory to 0.21% at just under clipping at say 38W. We could expect 0.05% THD at 2W.
GNFB from OPT sec to one of two input ports at input pair is not absolutely necessary as long as we
can produce a low THD drive signal of up to 22Vrms max to each 2SK134 gate.
The 2SK369 would never be able to do this job, IRF610 with idle current of about 50mAdc in each
might just do the job, but nowhere near as well as a pair of EL84 in triode mode, or a pair of ECC99.

I have found EL84 in triode in LTP can produce astonishingly low THD even when asked to produce
up to 80Vrms at each anode, as I have done at my 8585 and 300W tube amps.

Fig 5. Basic triode PP input to drive mosfet gates.
Fig 5 shows a very simple EL84 triode LTP with MJE 340 CCS to give fairly well balanced Va
to drive mosfet gates.

The idea can be taken further to include NFB from mosfet sources to the screen grids of EL84.
Fig 6. EL84 input/driver to mosfet output stage, balanced screen GNFB.

Most explanations of function are on the Fig 6 schematic. Screen g2 gm = 0.4mA/V and the g2 gain is
calculated at 50Hz as gm x ( RLa // Ra ). There are 2 parallel loads plus Ra :- gate bias R = 68k,
impedance of 3k3 in series with 1/4 of the total of all XL1 = 75k, Ra of EL84 at 20mAdc, 100k, so
resultant total = 26k. Screen g2 gain = gm x total RL = 0.4 x 26 = 10.4. This is just over 20dB.
I estimated 18dB. THD at 2SK134 sources at max class A is estimated at 0.33%, and all is fed back
to screens so = 1.0. THD is reduced by factor of 1 / ( 1 + [ A x ] ) = 1 / 11.4 = 0.087, or by more
than 20dB, so we may expect THD to be 0.033% at 44W class A. However, the EL84 will have some
slight 3H of up to about 0.03% at 20Vrms while working into loads of 75k//68k ie 35k, which is 14 times
triode Ra for EL84 so I can forecast THD of the amp > 0.1% at 44W.The only unbalanced function in
the amp is at input where V2 grid is grounded, and Vin is 2.6Vrms atV1 grid. This means commoned
cathode have 1.3Vrms, and Va-k for each tube is slightly different.But where there is a constant current
sink to both cathodes, and RLa in each are equal, the Va of each EL84 will be balanced within 1%, and
the so so will be the production of the balanced error signals, and any possible imbalance will be
corrected by the NFB action. The only way for me to verify that this schematic will work is to build it!
I can most certainly say that nobody would be able to simulate this schematic properly.

The PSU for the Fig 4 schematic is a little different to that in Fig 1 above because there must be a
+370Vdc supply for the EL84, and I also show them with 12.6Vdc to heaters, so I will have to replace
the toroidal PT which I used before 2000 when I built the 50W mono amps.
The original PSU from 2000 uses CLC filter for +33Vdc rail with C15 = 2 x parallel 4,700uF,
L1 = 15mH, Rw < 0.5r, C14 = 3 x parallel 15,000uF. At 3Adc, Vripple < 4mV, but there is some common
mode LF noise due to mains level changes. The PP excludes most common mode noise. The resonant
Fo for 15mH and 45,000uF = 6Hz, low enough.

The toroidal PT has one HT winding with 27Vrms each side of CT for the +33Vdc rail. I added turns to get
47Vrms each side to give +/- 65Vdc which is RC filtered down and shunt regulated with Zener diodes for
+50Vdc and -33Vdc for Q1+Q2+Q3. The amp is not troubled by wide variations in the mains voltages.

Between 2000 and 2016, nobody has complained about the sound which they found little different to the
best class A tube amps. I did run blind A-B tests and nobody could distinguish the difference when speakers
were switched from mosfets to tubes, with both amps having accurately preset input levels for equal Vo
and from the same preamp.

Should anyone never want to choke filtering or OPT they could settle for a complementary pair PP output
stage and driver stage similar to my 2X300W AB stereo amp. This has 3xNPN and 3xPNP 2SK1058 mosfets
and supply rails of +/-70Vdc with 50Vac each side of CT on PT.
The supply rails could easily be reduced to +/- 35Vdc, and all Ed about +34V, Pdd 17W at idle, Id = 0.5Adc.
Total Pdd for heatsink = 102W, quite OK for the heatsink size. Class A RL for each 2SK1058 = 60r, and the
6 mosfets work in parallel on 10r0 for 45W pure class A. But with 5r0, Class A Po = 22.5W, with class AB
at 88W, and this would please the vast majority of listeners.

I once did a blind A-B comparison with 4 gathered friends in 1996 and none could tell any difference between
the 2x300W in its original form when compared to an 8585 with 4 x 6550 per channel and OPT.
They didn't like me trying to trick them but they ended up agreeing that the "...same bastard built both bloody
amps so both amps sound good..."

So they didn't want to hang me on the tree outside, and I made them all a cup of tea.

There are 1,001 ways to build an amplifier.
For more simple ideas with mosfets and OPT go to Susan Parker's website at
She has some excellent ideas to consider, and has measured performance of modern mosfets in PP class A.
The PP connection with the same NPN devices instead of the normal complementary pair with both P and N
devices gives much less THD. 

With source follower configuration, the OPT primary has CT to 0V, and the OPT can then be an auto-transformer
with taps each side of CT for a number of pairs of connections to suit say 2r0, 4r0, 8r0 or 16r0.

There is no need for an isolation transformer, but the auto tranny must still be wound to have its 4r0 windings well
interleaved to get good HF response; the auto-transformer is more difficult to optimize and the isolation transformer
can be better for HF, but then I have thought a bit longer and I wrote a page at

I have also thought of using the Circlotron connection which has the advantage of grounded windings in the source
circuits, and drive to gates < 11Vrms, and the NFB in output stage is still just over 20dB.

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